| CODE | CCE1016 | ||||||||||||||||
| TITLE | Computer Logic and Organisation | ||||||||||||||||
| UM LEVEL | 01 - Year 1 in Modular Undergraduate Course | ||||||||||||||||
| MQF LEVEL | 5 | ||||||||||||||||
| ECTS CREDITS | 10 | ||||||||||||||||
| DEPARTMENT | Communications and Computer Engineering | ||||||||||||||||
| DESCRIPTION | This unit provides a thorough understanding of both combinational and sequential logic as fundamental concepts. The topics include basic building blocks such as latches and flip-flops, and the implementation of finite-state machines (FSMs). The unit also covers computer number representations, basic arithmetic algorithms, and basic computer microarchitecture concepts including the design of simple arithmetic and logic units, and simple control units. Study-unit Aims: 鈥� To provide a comprehensive understanding of both combinational and sequential logic in computer systems; 鈥� To facilitate the design and implementation of both ALU and control units in computer microprocessors; 鈥� To develop skills in designing and simulating combinational and sequential logic systems. Learning Outcomes: 1. Knowledge & Understanding By the end of the study-unit the student will be able to: 鈥� Accurately describe logic gates, truth tables, and Boolean algebra in combinational logic; 鈥� Explain the design and functionality of sequential logic components, including latches, flip-flops and finite-state machines (FSMs); 鈥� Detail the architecture and operational principles of arithmetic logic units (ALUs) and control units in computer microprocessors; 鈥� Compare and contrast various memory technologies such as SRAM and DRAM, including their characteristics and computer applications; 鈥� Analyze the structure of computer microarchitectures, instruction sets and processor types; 鈥� Demonstrate an understanding of sequential arithmetic algorithms, including their role in computer design. 2. Skills By the end of the study-unit the student will be able to: 鈥� Design and implement combinational logic circuits, demonstrating proficiency in techniques like the derivation and minimisation of sum-of-products and product-of-sums expressions; 鈥� Construct and test sequential logic systems, including shift registers, counters, and finite-state machines (FSMs); 鈥� Design, simulate and validate a simple ALU, showing ability to incorporate elements like multiplexers and full adders; 鈥� Implement and validate sequential logic systems; 鈥� Design, simulate and validate a simple control unit and other sequential systems using FSM techniques. Main Text/s and any supplementary readings: Main: 鈥� D. M. Harris and S. L. Harris, 鈥淒igital Design and Computer Architecture,鈥� 2nd ed., Morgan Kaufmann, 2013. Supplementary: 鈥� W. Stallings, 鈥淐omputer Organization and Architecture,鈥� 11th ed., Pearson, 2022. |
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| STUDY-UNIT TYPE | Lecture, Tutorial, Practical & Independent Study | ||||||||||||||||
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| LECTURER/S | Trevor Spiteri Gianluca Valentino (Co-ord.) |
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The University makes every effort to ensure that the published Courses Plans, Programmes of Study and Study-Unit information are complete and up-to-date at the time of publication. The University reserves the right to make changes in case errors are detected after publication.
The availability of optional units may be subject to timetabling constraints. Units not attracting a sufficient number of registrations may be withdrawn without notice. It should be noted that all the information in the description above applies to study-units available during the academic year 2025/6. It may be subject to change in subsequent years. |
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