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Title: Design of a logic state and logic timing analyser
Authors: Zammit, Saviour (1986)
Keywords: Computer logic
Logic programming
Operating systems (Computers)
Issue Date: 1986
Citation: Zammit, S. (1986). Design of a logic state and logic timing analyser (Bachelor's dissertation).
Abstract: Logic State and Logic Timing analysers employ a variety of trigger modes to reference the data captured to known events, so as to facilitate the interpretation of the traced stream. The major trigger facilities available in the design include a delay definable in a glitch trigger trigger, a time a trigger period, and twenty line comparison number of states or as capable of detecting 6 ns glitches. The system was interfaced to a BBC microcomputer, although it can be operated as a stand alone unit, by using a dedicated processor board instead of the BBC interface. The function of the BBC microcomputer is to provide software control for the system and to generate the three displays supported by the software. The software was developed incorporate a high degree of presentation and in displaying following the growing trend to graphic information in result the operational status of the instrument. A number of "Menus" were included to provide "user friendly" operation. a more The unit was designed with expansion in mind. This was achieved by using a Personality board which can be replaced by other optional boards, to expand and modify the system.
Description: B.ENG.ELECTRICAL&ELECTRONIC
URI: https://www.um.edu.mt/library/oar/handle/123456789/96880
Appears in Collections:Dissertations - FacEng - 1968-2014
Dissertations - FacEngESE - 1970-2007

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